1. Field of the Invention
The invention relates to a method for fabricating direct wafer bond Si/SiO.sub.2 /Si substrates.
The direct wafer bonding technique is based on a two-stage process in which the oxidized surfaces of two silicon wafers, a so-called handle (carrier) wafer and a so-called device wafer, are firstly joined together at room temperature and cross-link in a subsequent heat-treatment step at 800 to 1100.degree. C. The heat-treatment step serves to improve adhesion. A homogenous, fixedly adhering connection is achieved provided that the wafer surfaces are free of particles and mechanical defects.
The device wafer is then thinned to the desired layer thickness and the device wafer surface is polished. The layer uniformity of the wafer thickness and freedom from defects of the wafers prepared in this way depends on the quality of the starting material, the procedure in the course of the bonding itself and the method of thinning back.
Trenches are then etched into the device wafer surface. The etching time is in this case set such that the silicon of the device wafer is etched through as far as the bottom oxide. AS a rule, the bottom oxide is then slightly etched. In the worst case the bottom oxide is even etched away. The consequence of slight etching of the bottom oxide is that a reduction in the dielectric strength occurs due to the thinner layer thickness produced there.
After the etching of the insulation trenches, each individual insulation trench is filled with an oxide and polysilicon again. This produces "silicon islands" which are dielectrically insulated from one another. The "silicon islands" are dielectrically insulated from one another by the bottom oxide and the oxide fillings (connected to the bottom oxide) in the trenches.